Announcing - the FDIM 2025 LOGIC IC TRANSMITTER POWER CHALLENGE!

It was common in the early days of solid-state QRP to rig up a 7400 TTL chip as a crude QRP transmitter.  With a crystal and a handful of parts, it was possible to put a few hundred milliwatts on the air for a couple bucks.   While these simple IC-based transmit circuits have fallen out of favor, QRPARCI is revisiting this bit of QRP history with the FDIM2024 LOGIC IC TRANSMITTER POWER CHALLENGE!  The challenge is simple:  Design and demonstrate a crystal-controlled 40M oscillator/PA to make the highest sustained power for a period of one minute using only a single 4000-series or 7400-series logic IC.  This event will take place at 8:00 PM Friday, May 17 during FDIM, and the winner recognized at the QRPARCI Banquet on Saturday, May 18, 2024.

The rules for the competition are simple, but we have to list every nit-picky detail to test your endurance anyway:  The design is to utilize a single 4000 or 7400 series logic IC as the only active circuit element.  There are no limits on the number of diodes, inductors, resistors, capacitors, or transformers, but a single IC may be the only active device.

The PA must be crystal controlled within the 40M amateur band.  One (or more) section of the IC must be a crystal oscillator to control the frequency of the transmitter and builders are encouraged to use their own crystals, though there will be 7030 kHz HC-49 crystals available at the competition. No external frequency source may be used.

ICs to be used must be of the 4000-series or 7400-series.  Different logic families of this type such as 74LSxx, 74HCxx, 54HCTxx etc. may be used.

The circuit must fit inside a 12” x 12” x 12” volume.  During the power test, the judges will cover the circuit with a blast shield to protect judges and contestants from flying bits!

All circuit components are to be visible for inspection.

A schematic of the circuit is to be provided with each entry.

A zero-to-24v variable power supply, 40M band-pass filter, dummy load and power meter will be supplied by the judges.

The competition will have two rounds of trials to demonstrate power output of each circuit, with the best performance of each circuit being its final score.  During each test, the builder will connect his circuit, set the power supply voltage and then announce to the judges when to begin measurement.  During a period of one minute in which the builder may not touch the circuit or power supply, the RF power output at the end of one minute will be taken as the score for that trial.  Failure of the circuit in that one minute test period results in a score of ZERO for that round!  

The winner is the circuit generating the highest power score during either of his two rounds. If the circuit fails during the first test period, the builder will have five minutes in which to repair it before the second round trials. If your entry sets off the smoke detector in the Holiday Inn, you will be disqualified and may be subjected to rude laughter and finger pointing during the rest of FDIM!

The winner of the FDIM2024 LOGIC IC TRANSMITTER POWER CHALLENGE! will be recognized at the QRPARCI Banquet Saturday May 17, 2025.

Questions regarding the POWER CHALLENGE may be addressed to David Cripe NM0S, This email address is being protected from spambots. You need JavaScript enabled to view it..  Good luck and good building!